CMOS Design > Analog Cell Design

Current Mirror

The current mirror is one of the most useful basic blocs in analog design. In its most simple configuration, it consists in two MOS devices, as represented below. A current I1 flowing through the nMOS device Master is copied to the MOS device Slave. If the size of Master and Slave are identical, in most operating conditions, the currents are the same. The remarkable point is that the current is almost independent of the drain voltage of the slave V2. If the ration W/L of the Slave is 10 times the ratio of the Master, the current on the right branch is 10 times the current on the left branch.

A set of design techniques can improve the current mirror behavior.

• All MOS devices should have the same orientation. During fabrication, the chemical process has proven to be slightly different depending on the orientation, resulting in variations of effective channel length. This mismatch alters the current duplication.
• Long channel MOS devices are preferred. In such devices, the channel length modulation is small, and consequently Ids is almost independent of Vds.
• Dummy gates should be added at both sides of the current mirror. Although some silicon area is lost, due to the addition of inactive components, the patterning of active gates leads to very regular structures, ensuring a high quality matching.
• MOS devices should be in parallel. If possible, portions of the two MOS devices should be interleaved, to reduce the impact of an always-possible gradient of resistance, or capacitance with the location within the substrate.

1. Design MOS with large L:
2. Have same orientation for all the MOS devices :
	Process variation with different orientation
3. Have parallel structures
4. Add dummy gates at each side:

CMOS Design > Analog Cell Design > Current Mirror