| Radio-Frequency Circuits > Oscillators | |
The role of oscillators is to create a periodic logic or analog signal with a stable and predictable frequency. Oscillators are required to generate the carrying signals for radio frequency transmission, but also the main clocks of processors.
The ring oscillator is a very simple oscillator circuit, based on the switching delay existing between the input and output of an inverter. If we connect a odd chain of inverters, we obtain a natural oscillation, with a period which corresponds roughly to the number of elementary delays per gate. The fastest oscillation is obtained with 3 inverters (One single inverter connected to itself do not oscillate). The usual implementation consists in a series of five up to one hundred chained inverters. Usually, one inverter in the chain is replaced by a NAND gate to enable the oscillation (Figure 12-31).
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| Figure 12-31. A ring oscillator is based on an odd number of inverters |
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| Figure 12-32. The implementation of a 3-inverter oscillator |
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| Figure 12-33. The simulation of the 3-inverter ring oscillator |
The 3-inverter ring-oscillator layout is shown in figure 12-32. The right-most inverter output is connect the left-most inverter input by a metal bridge to create the desired feedback. Notice that no clock is assigned in this layout as the oscillation appears naturally, because of an intrinsic instability. The simulation of figure 12-33 shows the "warm-up" of the inverter circuit followed by a stable frequency oscillation.
The main problem of this type of oscillator is the very strong dependence of the output frequency with virtually all process parameters and operating conditions . As an example, the power supply voltage VDD has a very significant importance on the oscillating frequency. This dependency can be analyzed using the parametric analysis in the Analysis menu. Several simulations are performed with VDD varying from 0.8V to 1.4V with a 50mV step. We clearly observe a very important increase of the output frequency with VDD (Almost a factor of 2 between the lower and upper bounds). This means that any supply fluctuation has a significant impact on the oscillator frequency.
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| Figure 12-34. The oscillator frequency variation with the power supply |
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| Figure 12-35. The process variations also have a direct impact on the switching frequency |
The oscillation frequency of the ring oscillator is not stable, not controllable, and somehow not precisely predictable, as it is based on the switching characteristics of logic gates, which may fluctuate +/-20%. A Monte Carlo analysis is performed in figure 12-35, to observe the technology variation influence on the oscillator frequency. The basic principles of this analysis is to sort in a random way a set of technological parameters, and conduct for each random set the complete analog simulation. Each point in the X axis corresponds to one simulation, with a specific set of parameters. There is no correlation between adjacent points, because of the random nature of each simulation conditions. We observe again the significant fluctuation of the oscillator frequency. As a conclusion, ring oscillators have poor performances, and may only be used in low performance clocking systems, or for a dynamic characterization of the technology. We experienced the design of several ring oscillators on CMOS test chips also to tune Microwind simulations with real-case ring oscillator measurements, and obtained a good correlation between measured and simulated oscillator frequency.
In Microwind, the threshold and mobility parameters are varying with a Normal distribution, with a typical variation of 10%. The normal distribution of the threshold voltage Vt corresponds to a density of probability following the equation 12-8. The aspect of f versus Vt is given in figure 12-36.
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(Equ. 12-8) |
| Where f is the density of probability for a given value of the threshold voltage Vt(0 to 1) σ=0.1 (Equivalent to 10% typical fluctuation of the parameter) Vt0=typical threshold voltage (0.4V) Vt= threshold value (V) | |
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| Figure 12-36. The normal distribution of Vt, with a typical variation of 10% |
The LC oscillator proposed in this paragraph is not based on the logic delay, as for the ring oscillator, but on the resonant effect of a passive inductor and capacitor circuit. In the schematic diagram of figure 12-37, the inductor L1 resonates with the capacitor C1 connected to S1, combined with C2 connected to S2.
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| Figure 12-37. A differential oscillator using an inductor and companion capacitor |
The layout implementation is performed using a 3nH virtual inductor and two 1pF capacitor (Figure 12-38). Notice the large width of active devices to ensure a sufficient current to charge and discharge the huge capacitance of the output node at the desired frequency. Using virtual capacitor instead of on-chip physical coils is recommended during the development phase, for an easy tuning of the inductor and capacitor elements to achieve the correct behavior. Once the circuit has been validated, the L and C symbols can be replaced by physical components. The time-domain simulation (Figure 12-39) shows a warm-up period around 1ns where the DC supply rises to its nominal value, and the oscillator effect which reaches a permanent state after some nano-seconds. The measured frequency is approaching 3.75GHz with an inductor L1 of 3nH and capacitors C1 and C2 of 1pF.
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| Figure 12-38. A differential oscillator using 3nH inductor |
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| Figure 12-39. Simulation of the differential oscillator |
The Fourier transform of the output s1 reveals a main sinusoidal contribution at f0=3.725GHz as expected, and some harmonic contains at 2.f0 and 3f0 (Figure 12-40). The remarkable property of this circuit is its ability to remain in a stable frequency even if we change the supply voltage or the temperature, which features a significant improvement as compared to the ring oscillator. Furthermore, the variation of the MOS model parameters have almost no effect on the frequency.
We investigate the effect of VDD on the resonating frequency by lowering manually VDD from 1.2V down to 0.9V in the menu "Simulate"->"Simulation parameters". The result is a significant increase of the warm-up phase, while the final oscillation frequency remains unchanged. A parametric analysis on VDD, from 0.7 to 1.4V, confirms that the LC oscillator performs much better than the ring-inverter oscillator, as it reveals to be almost immune to supply voltage fluctuations.
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| Figure 12-40. The frequency spectrum of the oscillator |
For example, we investigate the effect of VDD on the resonating frequency by lowering manually VDD from 1.2V down to 0.9V in the menu Simulate > Simulation parameters. The result is a significant increase of the warm-up phase, while the final oscillation frequency remains unchanged. A parametric analysis on VDD, from 0.7 to 1.4V, confirms that the LC oscillator performs much better than the ring-inverter oscillator, as it reveals to be almost immune to supply voltage fluctuations.
Unfortunately, the inductance of an on-chip coil is not perfectly constant, as the material resistance, conductor width and oxide thickness may vary several %. The capacitance of a poly/poly2 structure, used for implementing the passive capacitor, may also vary due to the process fluctuation impact on the inter-layer oxide. The temperature also has an influence on the capacitance value [Etienne: add ref]. In Microwind, the Monte-carlo simulation mode also impacts the value of all virtual elements in a similar way as for the threshold voltage and the mobility: before the simulation starts, the L and C values are assigned a value that fluctuates +/-10% with a normal distribution around the user-defined impedance. The result is a significant variation of the oscillator frequency with the process parameters (Figure 12-41).
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| Figure 12-41. The frequency of the LC oscillator varies with the process parameters, mainly due to the capacitor and inductor process dependence |
It can be concluded that a predictable and stable frequency oscillation is very hard to obtain on-chip, without any external high precision component. In radio-frequency applications, abase frequency is almost delivered by a Quartz, which is the best discrete device to create an almost perfect oscillation circuit.
The voltage controlled oscillator (VCO) generates a clock with a controllable frequency. The VCO is commonly used for clock generation in phase lock loop circuits, as described later in this chapter. The clock may vary typically +/-50% of its central frequency. A current-starved voltage controlled oscillator is shown in figure 12-42 [Weste] . The current-starved inverter chain uses a voltage control Vcontrol to modify the current that flows in the N1,P1 branch. The current through N1 is mirrored by N2,N3 and N4. The same current flows in P1. The current through P1 is mirrored by P2, P2, and P4. Consequently, the change in Vcontrol induces a global change in the inverter currents, and directly acts on the delay. Usually not only 3 inverters are in the loop. A higher odd number of stages is commonly implemented, depending on the target oscillating frequency and consumption constraints.
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| Figure 12-42. Schematic diagram of a voltage controlled oscillator |
The implementation of the current-starved VCO for a 5-inverter chain is given in figure 12-43. The current mirror is situated on the left. Five inverters have been designed to create the basic ring oscillator. Then a buffer inverter is situated on the right side of the layout.
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| Figure 12-43. A VCO implementation using 5 chained inverters |
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| Figure 12-44. The access to Frequency vs. time simulation mode |
The VCO circuit frequency variation with Vcontrol by using the layout shown in figure 12-43. A convenient simulation mode is directly accessible (figure 12-44), to display the frequency variations versus time together with the voltage variations. The frequency is evaluated on the selected node, which is the output node Vhigh in this case. We observe no oscillation for an input voltage Vcontrol lower than 0.5V. Then the VCO starts to oscillate, but the frequency variation is clearly not linear. The maximum frequency is obtained for the highest value of Vcontrol, around 8.4GHz. By increasing the number of inverters and altering the size of the MOS current sources, we may modify easily the oscillating frequency.
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| Figure 12-45. The frequency variations versus the control voltage show a non-linear dependence |
A voltage controlled oscillator with good linearity is shown in figure 12-46. This circuit has been implemented in several test-chips with successful results in 0.8, 0.35 down to 0.18µm technologies. The principles of this VCO is a delay cell with linear delay dependence with the control voltage [Bendhia]. The delay cell consists of a p-channel MOS in series, controlled by Vcontrol,and a pull-down n-channel MOS, controlled by Vplage. The delay dependence with Vcontrol is almost linear for the fall edge. The key point is to design an inverter just after the delay cell with a very low commutation point Vc. The rise edge is almost unchanged. To delay both the rise and fall edge of the oscillator, two delay cells are connected, as shown in the schematic diagram.
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| Figure 12-46. The layout implementation of a high performance VCO circuit |
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| Figure 12-47. The layout implementation of a high performance VCO circuit |
The layout of the VCO is a little usual due to needs for a very low commutation point for the inverter situated immediately after the delay cells. This is done by implementing a large n-channel MOS (N1 in figure 12-47) with high drive capabilities and a tiny p-channel MOS with low drive capabilities (P1 in figure 12-47).
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| Figure 12-48. The simulation of a high performance VCO circuit |
The simulation of a high performance VCO circuit is given in figure 12-48. A quasi-linear dependence of the oscillating frequency with the input voltage control is observed within the range 0..0.6V. Although not displayed in the simulation, the voltage of Vplage has a strong influence on the oscillating frequency range. A high value of Vplage (Close to VDD) corresponds to high frequency oscillation, while a low value (Close to the threshold voltage Vt) corresponds to a low frequency oscillation.
The main drawback of this type of oscillator is the great influence of temperature and VDD supply on the stability of the oscillation. If we change the temperature, the device current changes, and consequently the oscillation frequency is modified. Such oscillators are rarely used for high stability frequency generator.
| Radio-Frequency Circuits > Oscillators | |