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CMSIS-CORE
Version 3.00
CMSIS-CORE support for Cortex-M processor-based devices
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Structure type to access the Floating Point Unit (FPU).
Data Fields | |
uint32_t | RESERVED0 [1] |
Reserved. | |
__IO uint32_t | FPCCR |
Offset: 0x004 (R/W) Floating-Point Context Control Register. | |
__IO uint32_t | FPCAR |
Offset: 0x008 (R/W) Floating-Point Context Address Register. | |
__IO uint32_t | FPDSCR |
Offset: 0x00C (R/W) Floating-Point Default Status Control Register. | |
__I uint32_t | MVFR0 |
Offset: 0x010 (R/ ) Media and FP Feature Register 0. | |
__I uint32_t | MVFR1 |
Offset: 0x014 (R/ ) Media and FP Feature Register 1. |